First read what's happening in the world — then try making your own chip.
Something big is happening in the world of semiconductors — big enough that you're tempted to call it a Cambrian explosion, set off by AI. The kinds of chips are multiplying, the common language of design has been opened up, free to use, and the way chips are made is starting to change. Making a chip — once the exclusive domain of vast capital and specialists — has come within reach of individuals and small teams. This series is a record of one attempt to first read the big picture of that world, and then get hands-on and see for yourself — connecting "knowing" and "making" end to end.
From "what's the difference between a CPU and a GPU?" all the way to ISA, RISC-V, what "2 nm" really means, maskless manufacturing, and physical AI. Ten chapters that read today's tectonic shift with no code and no schematics — analogies only. It even lays the groundwork for why we decided to try making chips ourselves.
↑ Start with the reading corner above for a map of the world.
There's a "machine" that actually carries out the "contract" we call the instruction set (ISA). This fundamentals course explains that machine while building it up, block by block, on your desk — walking through how a CPU works.
↑ Once you can see how a CPU is designed and the urge to build one finally catches fire, move on to the courses below.
Existing boards — Raspberry Pi, Arduino, ESP and the like — are used all over the world for their quality, ease of handling, and price. But sometimes the features or constraints you need just don't line up. From there grows a wish: to freely develop your own board carrying your own ASIC (a custom chip). This series is about taking on that challenge for real — reckless, or maybe just bold. We've split the skills you need into an order that builds up naturally: three foundations, plus a capstone that ties them together.
Why the reading corner comes first. The reading corner above isn't just a preface. A real tectonic shift is underway in semiconductors, and there's a question — "has the door really opened all the way to individuals?" The urge to find that out is the very reason these courses exist. Know the world (read) → and so, see for yourself (make). That order is the backbone of the series. Grasp the big picture in the reading corner first, and the "meaning" of each task in the courses becomes far clearer.
The upstream work is all one continuous ground. The Verilog you write for an FPGA and the code you feed into ASIC hardening (LibreLane) are essentially the same. In other words, by the time you're playing with an FPGA, your skill for designing a chip's "brain" is already growing. Running through both layers — silicon (the inside) and the board (the foundation) — with the same thinking and the same language is the core of this series.
Why this order. We lock in board (PCB) knowledge first. Building a board around an existing chip (say, the CH32V003) already widens your view and shifts how you see custom chips. It also makes it clearer, later, when a dev board "won't run," how to tell whether the cause is hardware (wiring) or logic (code), and where to start looking. Reduce physical uncertainty first, then raise the level of abstraction one step at a time — to logic (FPGA), then to chip fabrication (LibreLane).
This isn't a clean write-up of a finished manual — it's a running record of the experiment, kept alongside the work, until a chip that truly runs comes together. Caveats like "unverified" and "needs bench confirmation" appear throughout; these aren't defects but markers that the experiment is still in progress. We're verifying as we go, day by day, and aiming for tape-out by fall 2026.
(First draft: June 2026; updated as verification proceeds.)
Note: parts of this series were drafted with AI assistance. We take care with the content, but errors or awkward wording may remain — please confirm anything important against primary sources.
An end-to-end map to building your own chip. Each step shows which course below it maps to.
Graduate from hand-wiring on perfboard to designing and ordering your own dedicated boards. Lock down the "footing" first — then an advanced step that reworks design with code and automation.
Start from blinking an LED, then implement and verify your own CPU (RISC-V) and peripherals (UART/SPI) as logic circuits.
Assemble your own SoC and verify it thoroughly on an FPGA — understanding your system from both the hardware and software sides.
Take verified Verilog to manufacturing data (GDSII). Learn placement, routing, and physical verification with OpenLane/LibreLane.
Fabricate a real chip on a low-cost shuttle, then mount it on your own board with your KiCad skills. Complete a board that's one of a kind.
The first three (KiCad / FPGA / LibreLane) are foundation courses you can take on their own. Each locks down a separate base: the body (board), the brain design (logic circuits), and the inside (silicon physical design). The last one (Build-Your-Own RISC-V SoC, Practice) bundles those three foundations and runs from SoC design through tape-out and board-making in a single capstone — which is why both LibreLane (tape-out) and KiCad (board-making) reappear inside it. Separately from these three-foundations-plus-capstone, we've also prepared an applied course, "PCB Automation with Code & AI," as an extension of Intro to KiCad — reworking board design with code (skidl) and automated routing (FreeRouting) (an intermediate course to read right after Intro to KiCad). The "5-step roadmap" above is a timeline of the work; this list is a map of roles — different axes. Don't worry about the numbering: lock down the foundations first, then run end-to-end with the capstone. Each course is currently "in preparation" (early access).
Using the low-cost RISC-V microcontroller CH32V003 as its subject: from schematic to PCB design, ordering, and hand-soldering. The footing course that builds the "body" to run the silicon you design.
On the foundation from Intro to KiCad: write the connections as code (skidl), let FreeRouting lay the traces automatically, and finish the key spots by hand — an intermediate course. You'll take a self-powered 5 V CH32V003 board (with an added power section) from design to order, the new way.
With the freely reprogrammable Basys 3 / Artix-7, do real logic-circuit design at your desk, as many times as you like. Light up your own Verilog on real hardware, and finally run a RISC-V CPU (PicoRV32).
With open-source EDA alone, take a RISC-V SoC from RTL to GDSII. Do synthesis, automated place-and-route, and physical verification yourself, without commercial tools — bridging toward tape-out.
Design your own original SoC with PicoRV32 and Wishbone. Verify it thoroughly on an FPGA (Basys 3), and aim to run end-to-end through tape-out and board-making — the capstone of the series.